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Improving Memory Hierarchy Performance with Addressless Preload, Order-free LSQ, and Runahead Scheduling

Addresses and data values of all in-flight stores in an age-ordered store queue. A load accesses the data cache and in parallel associatively searches the store queue for older stores with matching addresses. Associative structures can be made fast, but often at the cost of substantial additional energy, area, and/or design effort. We introduce a new order-free store queue that decouples the matching of the store/load address and its corresponding age-based priority encoding logic from the original store queue and largely decreases the hardware complexity.

Addresses and data values of all in-flight stores in an age-ordered store queue.